The use of wide bandwidth (up to 7 GHz) at high frequencies (60, 70, 80 GHz) allows centimeter resolution and millimeter accuracy radar images.
The technology uses low-cost standard foundry technology and supports 6x6x1 mm or smaller packages with a power consumption below 0.1 mW, thus enabling portable/wearable devices. The designs support power supply voltages of 1.2 V or 2.75 V pending chosen technology.
The IP can be integrated with state-of-the-art digital foundry IC processes.
The use of I/Q-receivers supports identification of direction of motion detection.
The implementation at high frequencies (60, 70 or 80 GHz) reduces antenna size and allows for building radars with a small footprint. In-house experience is available to fully integrate antennas on-silicon, in the package or on separate substrates to enable application friendly implementations as users are not bothered by RF details and can concentrate on the application.
Various system level analyses have been performed to find the optimum application level performance. For instance the “stepped FMCW” radar principle has been compared to the standard “FMCW” radar principle and the optimum combination of both is proposed.
Potentially detrimental effects on overall radar performance like “chirp linearity”, “oscillator phase noise and range correlation” and many more have been analyzed and modeled with system level tools as matlab/python. The results can directly be used to analyze proposed changes in implementations on their merits.
The extensive system analysis has also been performed to define block-level and detailed-level IC level specifications.
This results in optimum overall system performance with a state-of-the-art low overall power consumption < 300 mW when all blocks are on, allowing a power consumption < 0.1 mW in the application.
With this information optimum blocks have been designed for ultra low-noise crystal oscillators, RF receiver front-end including LNA, mixers and if-amplifiers, low-noise wide-modulation-bandwidth high-frequency oscillators, (digital) PLLs with linear chirp modulation and low phase-noise, low-power local-oscillator distribution network, high-efficiency high output power PA, all with built-in-self-test (BIST) capabilities. Naturally extensive programmability is available to adjust optimum performance.
Examples of the IP are shown below at 60 GHz (scr60) and 79 GHz (scr79).
